От: seamless_info@mentorg.com
Отправлено: 25 августа 2004 г. 1:06
Кому: Michael Dolinsky
Тема: SoC Design and Co-Verification eNews
Seamless


Hello Michael

As you requested, following is your SoC Design and Co-Verification News Update featuring Platform Express™ for platform-based design, Seamless® for hardware/software co-verification, and Seamless ASAP for system optimization.




IN THIS ISSUE:


Seamless ASAP 1.5.0 Released
Mentor Graphics® Seamless® ASAP optimizes embedded systems by automating the move of software functions to hardware, speeding execution and reducing power consumption. ASAP Version 1.5.0 is now available. Some new capabilities of this significant release are the following:
  • ASAP generates both VHDL and Verilog as the implementation language for the synthesized hardware
  • Code profile data collected by ARM's Realview® ARMulator® ISS can now be used by ASAP to identify target software for conversion to hardware
  • ASAP targets Precision RTL and FPGA libraries for downstream implementation, adding to existing ASIC synthesis targets
  • ASAP now supports user-definable bus interfaces. Along with support for standard buses such as AMBA and generic interfaces, this capability offers greater flexibility in how the generated hardware is connected back to the host processor.
For more information about Seamless ASAP, visit our website.

Global Events
»   Live online seminar
Verification of your Embedded FPGA Design
(presented by Mentor Graphics and Xilinx)
September 29, 2004
 
»   Online seminar archives
Rapid AMBA-Based SoC Design using Platform Express
(presented by ARM and Mentor Graphics)

View all archived online seminars.
 
»   EDA Tech Forums
The EDA Tech Forum offers attendees the opportunity to learn about the latest technology trends and challenges facing the EDA design community. The Forums include industry expert keynotes, industry panels, hands-on workshops and technical tracks! Each event has specialist sessions for embedded system design and co-verifications.
  • August 26-27 - Tokyo, Japan
  • August 31 - Kyoto, Japan
  • September 2 - Seoul, Korea
  • September 14 - Ottawa, Ontario
  • October 6 - Reading, United Kingdom
  • October 18 - San Jose, California
  • November 17 - Dallas, Texas
Find out more about these events.
 
»   ARM Developer's Conference
Santa Clara, CA

Visit the Mentor Graphics booth #214 to see a demo or come see a presentation:
  • Maximize the Throughput of your ARM Design
    October 19, 2004 - 1:00-1:40

  • Application Optimization through the Use of ARM Core-Based Coprocessors
    October 20, 2004 - 4:10-5:00
PSP Update
Seamless for hardware/software co-verification supports more than 100 Processor Support Packages (PSP). Visit us to find a complete list.

New PSPs added include:
  • StarCore: SC1200 & SC1400 - Beta Release
  • TI: C6416 - Updated to Seamless 5.2
Partner Update
StarCore
The SC1200 and SC1400 DSP cores and related product platforms from StarCore are extremely efficient processors that enable SoC design for multimedia, communications, handset, and consumer product designs. The efficiency of the parallel architecture combined with the option of two development tool chains make StarCore the obvious choice and guarantees a shorter time-to-market. The option of a 4-MAC (SC1400) or a 2-MAC (SC1200) platform that is completely code-compatible makes the architecture selection simple.

Find out more about the StarCore DSP cores.
 
Co-Verification CD
Request a CD that includes information on Seamless for hardware/software co-verification as well as a product demonstration.
 
Press Coverage
Press release:
Huawei Technologies Partners with Mentor Graphics
(press release available in Chinese only)

New article:
Platform-Based Design and Verification with Automated IP Integration
EE Times - July 12, 2004
 
Technical Publications Available
  • Optimizing the Design and Verification of Embedded Systems
  • Seamless Hardware/Software Co-Verification of FPGAs
  • Managing Design Complexity through High-Level C-Model Verification
Check out the entire archive of technical papers available.
 
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We would appreciate any feedback you have regarding this newsletter's content.
 
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Best Regards,

Mentor Graphics Corporation
SoC Design and Verification Division
http://www.mentor.com/soc/verification



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Mentor Graphics, Seamless, ModelSim and XRAY are registered trademarks of Mentor Graphics Corporation. C-Bridge and Platform Express are trademarks of Mentor Graphics Corporation. All other trademarks mentioned in this document are trademarks of their respective owners.