Seamless Hello Michael As you requested, following is your System-Level Verification News Update featuring SeamlessR Co-Verification and Platform ExpressTM, platform-based design. _____ IN THIS NOVEMBER ISSUE: New Tech Paper - Seamless with C-Bridge Upcoming Technical Events - Online Seminar with ARC Seamless Technical Workshops Technical Training for Seamless Users Press Coverage _____ Technical Paper - C-Bridge ˙ Creating a C-Bridge Pin Interface Model Seamless with C-Bridge allows the designer to model parts of the hardware in C. These models can communicate with the processor bus in an efficient transaction level manner. In some cases it is also necessary for that same hardware element to communicate to the rest of the design, or to the processor, at the pin level. In order to facilitate this, a C-Bridge model can have an associated Pin Interface Model (PIM). An application note is now available to guide the user through the process of adding a VHDL or Verilog pin interface to a C-Bridge model. To obtain this paper, visit: http://www.mentor.com/soc/tpapers.cfm?paper=11239 Upcoming Technical Events ˙ Web Seminar ˙ Online Seminar with ARC Co-Verification of SoC Platforms 4 December 2002 Live webcast: 9am (Pacific Time) During this technical session, you will learn how to: Reduce development time, costs and risk with the ARCtangent development platform Accelerate software development and time to market using the ARCtangent and Seamless solution Improve product quality by fine-tuning the hardware/software interface before tape-out Develop an ASIC with a configurable processor Boost system performance using the ARCtangent and Seamless CVE Registration: http://www.mentor.com/seamless/seminars/arct/ Seamless Technical Workshops ˙ Seamless Technical Workshop ˙ Register today for a FREE, hands-on workshop to test drive Seamless! Meudon-la-ForĒt, France - 2 December 2002 Ottawa, Canada - 4 December 2002 Registration: http://www.mentor.com/seamless/workshops/description.html Technical Training - Seamless Users ˙ Co-Verification with Seamless http://www.mentor.com/es/courses/index.cfm?crs=063563 Learn to configure and control an embedded design for debugging using Seamless CVE. Private onsite classes available. MGC Education Services 800.345.2308 http://www.mentor.com/es education_services@mentor.com Press Coverage ˙ Mentor Graphics Offers Seamless Integration for Virtex-II Pro Developers Rob Kaye, Market Development Manager, SoC Verification Division, Mentor Graphics, XCELL Journal, published by Xilinx, Inc., Fall 2002 Find this article and others at http://www.mentor.com/seamless/articles/index.html _____ Best Regards, Mentor Graphics Corporation System-Level Verification Division _____ If you do not wish to receive future Seamless News updates, click here (or reply to this email message with "Remove dolinsky@gsu.by" in the subject) Copyrightc 2002 Mentor Graphics Corporation. Mentor Graphics, Seamless, ModelSim and XRAY are registered trademarks of Mentor Graphics Corporation. C-Bridge and Platform Express are trademarks of Mentor Graphics Corporation. All other trademarks mentioned in this document are trademarks of their respective owners.