Seamless Hello Michael As you requested, following is your System-Level Verification News Update featuring SeamlessR Co-Verification and Platform ExpressTM, platform-based design. _____ IN THIS SEPTEMBER ISSUE: Customer Success Paper - Hyperchip Partner Update Upcoming Technical Events - Online Seminars and Conferences Seamless Technical Workshops Silicon Valley EDA Tech Forum Press Coverage _____ Customer Success - Hyperchip Inc. ˙ Hardware/Software Co-Verification with RTOS Application Code Presented by HyperchipTM and Mentor GraphicsR Hardware/software co-verification is typically performed at a low level of abstraction, using an instruction set simulation model of a CPU in conjunction with a Verilog or VHDL model of the rest of the design. This article describes a higher level of software abstraction. The CPU subsystem will be replaced by an RTOS simulator and application code written to the application programmers interface of the RTOS. Verilog or VHDL is still used to model the rest of the design. Find this technical paper and more at http://www.mentor.com/soc/tpapers.cfm Partner Update - Denali Software ˙ Denali memory model licenses are still included with Seamless as always. No changes have been made! Come see Denali at our upcoming Silicon Valley EDA Tech Forum on October 29th! Upcoming Technical Events ˙ >˙˙ Online Seminar ˙ Online Seminar ˙˙ "Time-to-insight: Early verification of ARMR PrimeXsysTM Platform hardware and firmware" 2 October 2002 During this technical session, you will learn how to: Co-verify your embedded PrimeXsys hardware and software prior to tape-out Accelerate verification of PrimeXsys based designs using both RTL and abstract C modeling Registration: http://www.mentor.com/seamless/seminars/primexsys ˙ >˙˙ Online Seminar ˙ Online Seminar ˙˙ "SeamlessR Hardware/Software Co-Verification for XilinxR Virtex-II ProTM Platform FPGA" 23 October 2002 This web seminar will explore: Key features of the Virtex-II Pro Platform FPGA Design tools and flows for Virtex-II Pro Why is co-verification needed in the development of systems using Platform FPGAs? Seamless and its application to the Xilinx Virtex-II Design Flow Details on the Seamless solution configured for use with Virtex-II Pro Registration: http://www.mentor.com/seamless/seminars/xilinx/ ˙ >˙˙ MEAK Developer Forum for ARM SoC Technology TœV/Munich, Germany / 8-9 October 2002 Featuring Platform ExpressTM - Mentor's platform-based design technology Registration and more information: http://www.meak.de/meakforum/ ˙ >˙˙ Mentor Graphics Users' Group Munich, Germany / 10-11 October 2002 Presentations featuring Seamless with C-Bridge and Platform Express Registration and more information: http://www.mentor.com/germany/mug2002/ ˙ >˙˙ AlteraR SOPC World 2 Seminar Munich, Germany / 29 October 2002 Stuttgart, Germany / 31 October 2002 Learn more about Seamless hardware/software co-verification for SOPC. Registration and more information: http://www.altera.com/education/events/europe/sopc_world2/evt-index.html?xy=002_1 ˙ >˙˙ Seminars - Europe Ericsson and Nordic Solutions Expo/Seminars SoC Verification Solutions including Seamless with C-Bridge and Platform Express. Kista, Sweden / 1-2 October 2002 For more information and registration: http://www.mentor.com/nordic/expo For Ericsson employees: http://inside.ericsson.se/sourcing/pam/dev_tools/SolutionsExpo Nokia Solutions Expo/Seminars Seamless with C-Bridge and Platform Express Espoo, Finland / 3-4 October 2002 For more information or registration, contact Carin Grytberg at carin_grytberg@mentor.com SoC Seminar Meudon-la-ForĒt, France / 22 October 2002 For more information or registration, email info_mentor@mentor.com Seamless Co-Verification Munich, Germany / 19 November 2002 For more information or registration, contact Birgit Betz at birgit_betz@mentor.com Seamless Technical Workshops ˙ FREE Seamless Technical Workshop ˙˙ Register today for a FREE hands-on workshop to test drive Seamless! Irvine, CA - 8 October 2002 Meudon-la-ForĒt, France - 5 November 2002 San Jose, CA - 12 November 2002 Ottawa, Canada - 26 November 2002 Registration: http://www.mentor.com/seamless/workshops/description.html Silicon Valley EDA Tech Forum ˙ MISSED DAC? Don't miss the Silicon Valley EDA Tech Forum San Jose, CA / 29 October 2002 Silicon Valley Tech Forum ˙˙ Featuring industry leaders: Gartner Dataquest: Economic Outlook Chartered Semiconductor: Foundry and Design Tool Synchronization Mentor Graphics: Technical Sessions and Demos Register Now: http://www.mentor.com/events/svtf Press Coverage ˙ EDAVision, September 2002, Moving Targets and High Density--Designing for the Telecom Market - "Whatever the current state of the telecommunications market, it has been and continues to serve as an important driver of the EDA industry..." Learn how Seamless teamed up with Nokia to refine the co-verification solution for the telecom industry. Find this article at - http://www.mentor.com/seamless/articles/index.html _____ Best Regards, Mentor Graphics Corporation System-Level Verification Division _____ If you do not wish to receive future Seamless News updates, click here (or reply to this email message with "Remove dolinsky@gsu.by" in the subject) Copyrightc 2002 Mentor Graphics Corporation. Mentor Graphics, Seamless, ModelSim and XRAY are registered trademarks of Mentor Graphics Corporation. C-Bridge and Platform Express are trademarks of Mentor Graphics Corporation. All other trademarks mentioned in this document are trademarks of their respective owners.