Seamless Hello Michael As you requested, following is your Seamless News Update. _____ IN THIS MAY ISSUE: New App Note - C-Bridge DAC Suite Sessions - Register Now Technical presentation and demo - Platform Express Pac Rim Roadshow Series Seminar Series - Tensilica Seamless Technical Workshops Press Coverage _____ Application Note ÿ Seamles Application Notes ÿÿ Creating A Hardware 'C' Model That Connects to the Seamless C-Bridge API This paper describes the process of creating a simple slave model using C and the C-Bridge API. This document is intended for the beginner to understand how the basic C-Bridge API is used to allow a C model of a piece of design hardware to communicate with the processor bus. To access this app note and others, visit: http://www.mentor.com/soc/tpapers.cfm?sitehead=soc&navtabs=soc_1:1,soc_2verification:1&nav=seamless#seamless DAC - Suite Registration ÿ DAC 2002 ÿÿ Design Automation Conference 10 - 14 June 2002 New Orleans, Louisiana, U.S. >ÿÿ Technical presentations and demos Learn how Seamless with C-Bridge and Platform Express can shorten your development cycle and reduce project risk by attending a suite session or by visiting the Mentor Graphics booth. Seating is limited -- register today for a technical presentation! http://www.mentor.com/dac/sessions.cfm?grp=soc >ÿÿ Hands-on Tutorial Monday, June 10 - 2:00 to 5:00 pm AXYS Design Automation, Denali Software, Mentor's Seamless Co-Verification and Verisity Creating and Using a Virtual Prototype for Embedded System Verification Advances in EDA tools now make virtual prototyping a significant solution for embedded system verification. This hands-on session demonstrates a virtual prototype system encompassing a range of tools and models from different vendors enabling model creation, integration and verification of a complex multi-processor system. The focus is on tool interoperability and the verification methodologies to create a virtual prototype. Space is limited to 30 attendees - register today! http://www.mentor.com/dac/tech_program.html >ÿÿ Partner presentation - Virtex-II Pro: The Platform For Programmable Systems Tuesday, June 11 - 2:00-3:00pm Be sure to stop by the Xilinx exhibit in the Mentor Suite on June 11th to preview the Virtex-II Pro Platform FPGA and learn how Seamless provides co-verification support for the device. Register to win the sleek Handspring Visor Edge, which comes complete with a zippered leather case during the Xilinx presentation. http://www.mentor.com/dac/sessions.cfm?grp=hdl >ÿÿ Hands-on Demo - Platform Express Test drive Platform Express, Mentor's platform-based design methodology, via a hands-on, interactive design demonstration - available only in the Mentor Graphics suites so don't miss this opportunity! Also, register today for a Platform Express technical presentation at http://www.mentor.com/dac/sessions.cfm?grp=soc Platform Express - Technical presentation and demo ÿ Platform Express Explained Mentor Graphics Japan will present a half-day seminar with OKI Semiconductor and Fujitsu Semiconductor. The presentation and demo will include Platform Express, platform-based design capabilities and libraries from ARM, Fujitsu and OKI. June 19 - Tokyo June 21 - Osaka For more information or if you are interested in pre-registering, please send an email message to mktg_mgj@mentorg.co.jp . Pac Rim Roadshow ÿ China Roadshow 2002 ÿÿ July 11 - HsinChu, Taiwan July 12 - Taipei city, Taiwan July 16 - Seoul, Korea July 19 - Singapore July 22 - Bangalore, India Mentor Graphics presents the SoC Solution in the Pac Rim Seamless - the hardware/software co-verification solution Celaro - the super engine (available outside of the U.S. only) DFT strategies for SoC Real life platform-based design For registration or more information, visit http://www.mentor.com/roadshow/index.cfm European Seminar Series with Tensilica ÿ Designing the new SoC - The Opportunities of the Configurable System To design the optimum system-on-chip (SoC) means getting the system aspects right the first time, as well as making sure that the implementation of the chip is correct. ASIC and embedded software engineers have been making use of the configurable processors and hardware/software co-verification to improve and check their implementations for several years. Upcoming Seminars: Newbury, England - May 28 Cambridge, England - May 30 Kista - June 6 Bristol, England - June 20 Helsinki - late August (exact date is to be determined) Utrecht, Netherlands - Sept 24 Dublin, Ireland - Sept 25 For UK locations, register at: http://www.mentor.com/uk/events/soc-registration.htm For Nordic locations, register at: http://www.mentor.com/nordic/events/technical.htm Stay Tuned...Seamless and Tensilica will be co-sponsoring Lunch and Learn Seminars in the U.S. Seamless Technical Workshops ÿ FREE Co-Verification Technical Workshops ÿÿ Upcoming Workshops: Phoenix, AZ - May 30 Minneapolis, MN - July 11 Toronto, Canada - July 23 To register or request a workshop in your area: http://www.mentor.com/seamless/workshops/description.html Press Coverage ÿ Technology provides a bridge to C EDN, Gabe Moretti The Seamless Co-Verification C-Bridge technology is an extension to Seamless to incorporate C, C++ and SystemC hardware descriptions into the co-verification environment. This technology supports both system level prototyping and accelerated verification by allowing any mixture of C and RTL in your simulation. Read more http://www.e-insite.net/ednmag/index.asp?layout=article&articleid=CA209110&industryid=2813 _____ Best Regards, Mentor Graphics Corporation SoC Verification Division _____ If you do not wish to receive future Seamless News updates, click here (or reply to this email message with "Remove dolinsky@gsu.by" in the subject)