EDA News Monday August 25, 2003 From: EDACafe _____ Cadence _____ About This Issue QIP & The Art of Motorcycle Maintenance Get past the acronyms, and the rest is easy _____ August 18 - 22, 2003 by Peggy Aycinena Read business product alliance news and analysis of weekly happenings _____ DWG - Development Working Group (pronounced, "Dwig") IP - Intellectual Property ISO - International Organization for Standardization QIP - Quality Intellectual Property SoC - System on a chip VC - Virtual Core VP - Vice President VSIA - Virtual Socket Interface Alliance On a breezy afternoon in mid-August, I chanced upon a great conversation with Larry Rosenberg and Kathy Werner, both of VSIA fame. Larry is VP of Engineering for the organization and Kathy is Chair of VSIA's VC Quality DWG. (Kathy also has a day job as a manager in Mentor Graphic's Design Reuse Group.) Both Larry and Kathy were very jazzed about a VSIA announcement dated August 21st (see below), and in listening in on their discussion, I was convinced that their enthusiastic optimism is well founded. Larry started by telling me that prior to his current tenure at VSIA, his background included 15 years at RCA and 6+ years at Cadence. He said there are two things he loves about his job - interacting with people, and getting some of the most competent technologists in the world to solve difficult problems for nothing. Kathy, who apparently is working on the QIP Metric for nothing, suggested that maybe she and others like her could at least get a free lunch out of the organization now and then. Larry laughed out loud. The Quality IP Metric Announcement The VSI Alliance, an industry association chartered with developing open standards for SoC development and reuse, announced that the QIP Metric is now in member review and member companies have been identified to begin beta testing. The QIP Metric was created by VSIA's VC Quality DWG to address the growing need for a standard that would allow both the designer of the IP and the IP integrator to measure the quality of an IP core against a checklist of critical issues. The Quality Metric efforts began with a VSIA study group three years ago and was moved into a DWG effort eventually headed by Kathy Werner, Mentor Graphics, and Scott Batzer, Intel. Other companies involved in the study group and/or DWG include Agere Systems, Alcatel, ARM, Cadence Design Systems, Fujitsu, FZI, Motorola, sci-worx, STMicroelectronics, Synopsys, Toshiba and others. Additional work included in the Metric is the result of the recent contribution of ChartReuse IP from Agere Systems and Cadence Design Systems and the earlier donation of OpenMORE IP assessment program donated by Synopsys and Mentor Graphics. This was preceded by a donation from STMicroelectronics of their Quality Attributes Checklist. Many of these companies will s! oon be participating in beta testing of the QIP Metric. The Quality IP Metric Conversation Larry: "The QIP initiative goes back maybe 4 years, when lots of people started saying that quality IP, or the lack thereof, was becoming a big problem for the SoC industry. So VSIA put together a Quality study group with a bunch of key participants from the top companies in the world. However, even defining the concept of quality itself became a daunting task. It took three long meetings just to define the term. [Ultimately], we settled on a definition, useful for our purposes in discussing IP." "We define 'quality' as 'conformance to specification.' Now, it's true that 'fitness to purpose' could also be a definition, but most customers really only care if IP meets their specifications. In fact, it's actually a two-step process. First you need to see that the specification meets your needs - in an SoC, for example, you might need low power, but don't want high performance - and only then do you look to see that the component does what the specification claims." Kathy: "I agree with Larry. Quality is one of those gray areas that means different things to different people, and it encompasses a lot of different aspects. [Not surprisingly], to quantify and measure the quality of IP was one of the most difficult tasks facing the Quality DWG." "[Meanwhile], the definition of IP has grown, as well. At one time, IP used to be just a package of AND gates. Then it was standard cell libraries, then it was macro cell libraries. But the definition has continued to grow and expand as the technology has grown." Larry: "We've had a number of companies, many of them international, who have been extremely interested in our efforts. The problem with [the task at hand] is that it's somewhat like rating a restaurant. You can't really rate a restaurant globally. You have to rate it instance by instance with respect to quality, service, price, and ambiance. It's the same with IP." "However, once we got started on detailing the metrics [we were going to use to quantify the quality of IP], we had help from many companies. Fortunately, for instance, STMicroelectronics donated their Quality Attributes Checklist to VSIA. Then Synopsys and Mentor Graphics donated their OpenMORE IP assessment spreadsheet, which all became one metric. Agere Systems had a metric, which was a derivative of OpenMORE, called ChartReuse IP - also from Cadence - and they realized that that would be a valuable thing to contribute. Combining all of this, we came up with the QIP Metric spreadsheet." "Meanwhile, Kathy has been concerned that [many] things were not quantifiable, that it would be difficult to assess the correctness of an answer on the spreadsheet. So we have looked at all of this throughout this process." Kathy: "The QIP Spreadsheet has gone through quite an evolution and now includes four axes. The first is IP authoring, the second is IP verification, and the third is maturity of the IP - has the IP been integrated into an SoC, has it been used in different manufacturing processes, is it actually in silicon, has it been through a shrink, how many times has it been used. The fourth [and final] axis is vendor maturity - a measure of the support mechanism for the IP, the capability of the vendor, ranking Mom-and-Pop type shops versus the likes of an ARM, is there support if you have problems, are there time-zone issues, PMC-type certification, [and so forth]. Although some of these metrics produce yes or no answers, many are qualitative, but we want to quantify those answers [as well]." "In creating the spreadsheet, we started by drilling down into the four axes and learning what things were most important to people. For instance, gated clocks are important to some, but not to others. Does the IP support scan chains? If it's for a low-production product, you may not want the overhead, but in a high-production product, you may be willing to [accommodate additional overhead]. Resets are another big area in IP - are they synchronous or asynchronous? Are there combinational feedback loops - which can be good for speed or size, but can screw up testing. [Clearly], there are lots of things that affect feasibility and applications in using IP. The spreadsheet asks, for instance, 'Is the IP accurate? Was it easy to use? Was the delivery process straightforward? Was the documentation complete?'" "There's a lot on the QIP Metric Spreadsheet, and we're now starting the beta testing. Not all of the best testers will be IP vendors, however. IP providers [vendors] will fill out the spreadsheet with the details about their IP, while there's another section in the spreadsheet that will take information from integrators of IP. [We know] that beta testing requires a commitment from the companies involved." "I'm acting as the focal point for the process. We're only beta testing in a limited number of companies - the goal is three to six companies. The actual logistics of the testing will be staggered, so I don't anticipate fielding hundreds of calls on any one day. [Meanwhile], we're getting lots of input from different companies in the DWG, with the final release of the spreadsheet being targeted for this fall." Larry: "Although there are many companies involved, most of them are sensitive about going on record. [Suffice it to say] that a reasonable number of companies listed in the DWG will be involved in beta testing the spreadsheet. There's a minimum of 30 days for member review. Of course, we can't mandate that the companies review the spreadsheet. We can only ask them [politely] to use it. We know that [beta testing represents] a substantial effort and that it must come at the correct time in the company's schedule. If the company happens to be evaluating IP right now, then [hopefully they will participate in the evaluation]." "[Once we up and running in the fall],VSIA member will be able to download the spreadsheet off of our website. They will not be permitted to post it on any external website of their own, but they will be free to report results of the spreadsheet as they choose. It's a self-assessment of sorts." "[Importantly], VSIA is not trying to police the results, although we're anticipating that [eventually] people will want some kind of certification mechanism put in place. [It's always true that] some vendors are scrupulously honest, while others may be very 'liberal' [in applying quality standards to their IP offerings]. Ultimately people would be interested in [someone who could] arbitrate quality. There are lots of discussions going on right now about forming an IP Adoption Group - about trying to figure out what and how to do the policing on the quality of IP. VSIA will have lots more to say about this in the next 6 months. [Certainly] we're anticipating certifying IP sometime in the future." "The way to think of certification is not that we're going to guarantee anything. Certification will be more like an ISO-style process. It still has to be worked out and they'll have to decide what they want to do. The bottom line is that there's tremendous interest in certification. We've already made the decision [to go there eventually]." Kathy: "Sometimes, I've really got to chuckle about the world of IP. There's definitely a difference in who you get the IP from - and there's lots that can be done to make it more user-friendly and reusable. There's a difference between night and day in using different vendors. The things that one vendor does, for instance, may not be important at all, but may be key if the IP's from someone else. The current state of affairs is such that it requires lots of resources and overhead to do a full test on IP. If you, the customer, had something that you could pull down in 5 minutes - like the spreadsheet - and use to compare [different offerings from different vendors], you be able to say [quickly], 'This one's the right one.'" Larry: "Kathy's exactly right. There's a high cost to the customer in trying out IP. There's also a high risk to the vendor. Soft IP that's loaned out can be [permanently borrowed] by the customer. The process requires trust on both sides. If you're a vendor, you want to know that whoever's evaluating your IP is serious about buying it." "The IP industry is still very young and immature. In the early days of buying shoes, for instance, people bought whatever they saw. You couldn't go to a store. Now you can go to reputable stores. If other people bought stuff there [and were satisfied], the product and store would stay in business. Otherwise, they wouldn't last." "ARM started in the mid-to-late 1990's and struggled for 10 years to be successful." [But even today], there are a lot of 'garage-ups' selling IP." "The hallmarks of a mature industry - the marketplace is sophisticated enough and low-quality products get weeded out quickly. In the early days of a market, when it is still immature, the situation is very chaotic. It's very 'Buyer Beware.' Both VSIA and non-VSIA companies have heard about our initiative and are very excited." Kathy: "We've even had a company join VSIA recently because they're specifically interested in this Quality DWG." Larry: "Now a lot of IP companies complain because it's so hard to assess quality differences. The only metric used today - the single most important issue for vendors and customers alike is cost. The customer looks at the specification and if it's about right, then you negotiate for price. [However], many IP vendors have problems with the quality versus cost [thing]. They can't convince customers why their IP comes with a higher price tag. With the QIP Spreadsheet, people will be able to measure price and quality. There will [therefore] be a real incentive to the IP vendors to get the quality up. Then and only then will they be selling product [using the correct metric]." "Most IP companies believe they're good companies and believe they'll look good if they're measured [on an objective basis] - just like all drivers believe they're above-average drivers. The IP industry has been struggling [of late], and some of that includes [issues] of poor quality. I've been surprised that the IP companies have been the most enthusiastic [about our efforts], indicating that they've got the most to gain. So customers and IP vendors are seeing the QIP Spreadsheet as a win. Right now, there's just an incentive to have low cost without measurable quality. If a company can sell low-quality IP to a customer and get away with it, they' won't get royalties because [in the end], the product won't work - and that fact will spread by word of mouth." "In the end, it's a free market, but also one that needs a balance between cost and quality. The time frame is such that, in a normal free market, good products get well-known to people. However in the IP market, the turnover of IP is very quick. By the time the market knows that an offering is good, it's [already] obsolete." "The IP market's been hurting for 4 or 5 years, since the late 1990's. In 1996, when VSIA came on the scene, there was belief that there would be a rapidly growing and healthy third party IP industry within 2 or 3 years. There has [actually] been a 30 to 40 percent growth in the market since the 1990's. That's healthy, but not spectacular." Kathy: "[The problems with IP] have been a gradual realization. When everybody started buying IP, they knew there would be hurdles. But eventually, everything got really painful. Different groups within the same company were buying IP from the same vendors, but having [wildly] different results." Larry: "It's been a slowly evolving process to get all the beta information, and it's going to [continue] to take some time to get it all done. In the meanwhile, we all agree that this is the most exciting thing we've done in a long time. And, everybody agrees that VSIA is the right organization to do this. We're really excited that so many world-class SoC companies have joined in on this effort." "[Most importantly], we've really spent quite a lot of time defining quality. It's like that book on motorcycle maintenance - you can go crazy trying to figure out what quality is. Luckily, nobody here at VSIA went crazy in the process." Kathy: "That might be open to debate." (Editor's Note: Zen & the Art of Motorcycle Maintenance: An Inquiry into Values was written by Robert Pirsig and first published in 1974 to great critical acclaim. Seen by many as a cult classic - as much fact as fiction, as much commentary as chronicle - the book is a probable must-read for anyone born before 1960  or since then, for that matter.) Industry news - Tools and IP Atrenta Inc. announced that it has developed a new OEM Sponsorship Model and web-based delivery system to allow "strategic partners" to deliver sponsor-specific versions of Atrenta's SpyGlass customers. The company says the web delivery model is flexible and token-based, and will offer a convenient and cost-effective solution to sponsors that helps reduce design iterations and streamline integration. Don Friedberg, Director of Design Methodologies at Agere Systems, said, "Two important features in our ASIC development platform process are the flexibility to create our process-specific rules and the ability to deliver these to our customers as we require. Atrenta's flexible business model and web-based delivery has been critical to the success of our program and it has been well received by our customers." ChipMD, Inc. announced that its first software product, DesignMD, is now shipping. The company itself was announced earlier this year and is competing in the Design for Yield space. This first product is aimed at what the company describes as "one of the biggest problems in the IC industry today, yield," and includes Deterministic Yield Optimization (trademarked by ChipMD) technology to "improve parametric yield at the pre-layout design stage (or transistor level) using IC process data for nanometer processes." Ken Maples, Vice President of Customer Support at ChipMD, told me in a recent phone call: "The focus of the product is design for yield, which is our key message. The technology comes out of a joint venture with people at the Technical University of Munich and is already silicon-proven on existing customer in Europe. Those customers have seen huge increases in production yield with DesignMD." "Currently, a product may tolerate variations in the manufacturing process, but if it's a poorly designed product, it will not tolerate those changes. And, whereas previous yield optimization techniques to address this have been ad hoc at best, DesignMD allows users to produce a framework and methodology to optimize yield and performance across manufacturing processes and environments. We see the product becoming critical for analog, mixed-signal, and RF designers. From the millions-of-dollars viewpoint, helping customers get product to market faster and improving the performance is what a typical EDA company does and saves millions of dollars. However, we can help customers improve the yield of the device once it's actually in production. We're not just saving them millions of dollars, we're saving them tens of millions of dollars. It's the ability to improve final yield that gives a tremendous boost to the bottom line." Mentor Graphics Corp. announced the latest version of its FPGA BoardLink tool, which automates the integration of FPGA and PCB design processes. The company says this new version "addresses the challenge of representing today's large, high pin-count FPGA devices by making it possible for PCB designers to partition or 'fracture' them into smaller, more manageable symbols that can be schematically represented." Rob Davies, EDA System Manager for Honeywell Aerospace Yeovil, said, "FPGA BoardLink with fractured symbol support has enabled us to reduce the time taken to initially produce and iterate our schematic and PCB layout data for even modest size (200+ pin) FPGAs from two days to a matter of minutes. As we move up to 1,000+ pins, this software becomes an essential part of integrating FPGAs into our PCB layout flow." Silicon Metrics announced that ALi Corp. has adopted SiliconSmart MR for instance-specific timing and power characterization of embedded memories in nanometer-process SoC designs. Ali says it chose SiliconSmart MR for the high throughput and accuracy of its characterization and modeling capabilities, and that the tool is now a standard part of ALi's SoC design production flow for all embedded memories. Chin Wu, President of Ali, said, "Silicon Metrics technology provides the functionally correct timing and power models that are the foundation for our embedded memory design flow." Coming soon to a theater near you COMS - The 8th International Commercialization of Micro and Nanosystems Conference will be taking place from September 8th to the 11th at The Grand Hotel Krasnapolsky in Amsterdam. Organizers say the technical program this year will feature technology roadmaps, market trends, and commercialization strategies. The conference expects to draw over 250 attendees, will have 100+ speakers/panelists and 20+ formal sessions, panels, and roundtable discussions. The event is sponsored by the Micro and Nanotechnology Commercialization Education Foundation (MANCEF) and is described as "the most important and largest conference dealing with the topic of Micro and Nanosystems commercialization in the world today." Mentor Graphics Seminar - The company is hosting a technical forum on simulation-based signal-integrity analysis of multi-gigabit interconnects. It's free and coming to a city near you sometime in mid-to-late September. - September 16th in San Jose, September 18th in Dallas, and September 23rd in Boston. Seminar organizers say: "As clock frequencies and data rates soar, digital designers are being forced to account for the effects of degraded high-frequency signals, causing otherwise healthy bit streams to be unrecognizable at receiver ICs. This technical forum will focus on simulation-based signal-integrity analysis of multi-gigabit interconnects. Methodologies for understanding and proactively dealing with multi-gigabit interconnect problems will be discussed, as well as future trends in IC technology. Topics will include eye-diagram and jitter analysis using multi-bit stimuli, lossy-line and advanced via modeling, inter-symbol interference, integrated simulation with both HSPICE and IBIS, and multi-gigabit system verification with Mentor Graphics ICX and HyperLynx GHz." ( www.mentor.com ) Newsmakers E*ECAD, Inc. has named Richard Timpa to be Strategic Accounts Manager reporting to Richard Siemiatkowski, President of E*ECAD. Timpa will oversee all strategic account management. He has 25 years of semiconductor executive sales and business development experience across a range of companies including Solectron, Fastparts.com, LSI Logic, VLSI Technology, and Intel Corp. Timpa has a BSEE from New York City College. In the category of... Letters to the Editor July 28th - The Root of all Evil & Making a silk purse out of a sow's ear Jeff Jaeggi - "Just wanted to say very well written, thought provoking material. I'm sure I'll be using that quote sometime soon, that premature optimization is the root of all evil! And your optimist/pessimist editorial at the end was very telling. I have to agree with you that, as more jobs are lost, it's difficult to accept the rhetoric of good times ahead." Milan Bhatt - "At the end of your article, you mention talking to a friend about his doom/gloom opinions on youth and politics, but I didn't see any details. I'm curious, what exactly where his predictions on those topics? Perhaps the conversation was bound by some NDA, but in the case that it wasn't, I'd be interested to see if our ideas match." (Editor's Note: My friend thinks that young students - high school and college - are apathetic, uninspired, and uninformed about world events. He thinks politicians in Washington, Sacramento, and Silicon Valley are corrupt, wasteful, and/or incompetent. Not everyone would agree, but he seems pretty sold on his worldview.) August 4th - A Delicate Balance Kathryn Kranen, President & CEO at Jasper Design Automation, Inc. - "I was so pleased with your article on work/family balance. I've received lots of positive emails, and I even had a male EDA employee whom I'd never met stop me in a restaurant today to say how much he valued the article - as a father of two toddlers. Thanks! I really appreciate the coverage, and I feel the issue is important and timely." August 11th - Venn Diagram or Musical Chairs Dick Selwood, New Technology Communications Ltd. - "Loved this week's newsletter. Maybe Executive Musical Chairs should be an annual event at DAC, perhaps on the first night. Or the CMP party might be a good venue, giving the band a break. For the sake of the poor MarCom people organizing booth duty rotas, it might have to be on the last night, or even on Thursday morning. The event could be sponsored by the EDA Consortium, perhaps the Emergent Companies Committee. So Steve Pollock would get to stop the music." "In states where such things are allowed, a small gambling element could be introduced, with DAC visitors and exhibitors encouraged to bet on the winners of the most coveted chairs. And maybe the chairs could be in different styles, with those companies close to IPO comfortably padded and the really new companies' chairs a little more stark. Established technologies could be conventional chairs while the newer and more experimental technologies would be more recherchi chairs, or chairs with a single leg." "In tight times, there could be far fewer chairs than there are players, while when the industry returns to a roll, we could go back to the situation where there are more chairs than players and lesser mortals - outside the ten people in EDA - can be allowed into the game. Since there are only ten people in EDA, then perhaps these could be virtual players, and that opens the door to putting the game on the web." "But no, that would be silly. Wouldn't it?" (Editor's Note: I think Dick might be onto something here.) August 18th - O Canada! Rex Tracy, Senior Electrical Engineer at Mania Tech (now Noah Systems) - "I see that EDA Cafe gives some room to some of the smaller EDA companies. But I have never seen you do an article on one particular 'rising star' - Electronics Workbench's product MultiSim or their related products. This one seems to be making a difference for the smaller guys (users). So, give them a review." (Editor's Note: It was this e-mail which inspired the article on EDA in Canada. Ironically, the folks at Electronics Workbench and I were unable to coordinate our calendars and their input was not in the article.) Nuf Si - "Interesting article about EDA in Canada. I'm surprised, [however], that no mention was made of Right Track CAD, a company founded by a University of Toronto professor and a couple of grad students. They were developing FPGA architecture-exploration and placement & routing tools, and were acquired by Altera in 2000." Bozena Kaminska - "It was really a pleasure to read about Canada, and EDA in Canada. In 1997, I started OPMAXX in Portland, OR, which later on was acquired by Credence. [The company was a] result of my research at Montreal University (where I was a professor) and the first company in analog and mixed-signal EDA and testing. [Still] today, companies and researchers are using my research, tools and technology (including Logic Vision who has the rights to one of my patents). I was nominated in 1997 as an Innovator of the Year by EDA, still stay active today in many IEEE committees, continue research in new topics, and have my second company - Pultronics - which is successful in mixed-signal IP and wireless devices. [The company is] private and relatively small, but growing. As a woman in the electronics/EDA industry I recognize a liberal working environment in Canada, which is different in the U.S. It is my sixth year in Portland and I enjoy the West Coast, but Canada ha! s a very special meaning for me and probably all Canadians. Thank you for giving good coverage of Canada and EDA there. Canada is a great country with great values and education standards." Scott McLellan, President & CEO at Icinergy - "Just wanted to say thanks for the article. I've received several positive comments on how helpful this is for the Canadian electronics industry in general. One minor note is that my former company was UniCAD not EEcad. The folks at EEcad may be letting you know that they don't know me:)" (Editor's Note: My apologies to both UniCAD and EEcad. The correction has been made to the on-line version of the article. Although, if the folks at EEcad don't know Scott, they're missing out.) --Peggy Aycinena is a Contributing Editor and can be reached at peggy@ibsystems.com . You are subscribed as: [dolinsky@gsu.by]. CafeNews is a service for EDA professionals. EDACafe respects your online time and Internet privacy. To change your subscription details, including format and frequency, or to unsubscribe, please click here or visit http://www10.edacafe.com/nl/newsletter_subscribe.php. If you have questions about EDACafe services, please send email to edaadmin@ibsystems.com . Copyright c 2003, Internet Business Systems, Inc. All rights reserved.