Hello Michael As you requested, following is your SoC Design and Co-Verification News Update featuring Platform Express™ for platform-based design and Seamless® and Seamless FPGA for hardware/software co-verification. In this issue: Editorial Coverage Technical Papers New Online Seminars PSP Update Seamless FPGA Co-Verification Tool Tradeshows & Conferences - ARM Dev Con Partner Highlight - Texas Instruments TMS320C6455 DSP EDA Tech Forums

	Editorial Coverage
	Improving Verification Coverage of ARM SoCs While Reducing Simulation Runtime - Information Quarterly View the article

	Technical Papers
	View the entire Functional Verification technical publications library.

	New Online Seminars
	»   Effective Verification of Freescale Secure Communications Processors Developed jointly by Freescale Semiconductor and Mentor Graphics, this online seminar describes how to use Seamless for co-verifying PowerQUICC-based devices. Watch the archived seminar today   »   Your Design: Boot It Before You Build It During this short presentation, you will learn more about Seamless--Mentor Graphics' hardware/software co-verification solution. We will discuss the goals of co-verification and the best time to conduct it, both for hardware and software. We also look at performance analysis of software memory and bus characteristics. Watch the archived seminar today

	PSP Update
	We have released the following PSPs: ARM: ARM1156 Freescale: MPC8548E Details on all Seamless PSP support

	Seamless FPGA Co-Verification Tool (PowerPC)
	Seamless FPGA brings together the debug productivity of both a logic simulator and a software debugger. Seamless FPGA co-verification enables you to remove synthesis and place and route from the design iteration loop, while yielding performance gains 1000 times faster than logic simulation. Download free evaluation copy

	Tradeshows & Conferences
	ARM Developers' Conference October 4-6, 2005 Santa Clara, CA ARM Developers' Conference will bring all third-party ARM partners together in one place with a strong exhibition and technical track focus. Visit the Mentor booth and attend our sessions: Architectural Exploration of Embedded Systems that Employ Advanced Bus Schemes Analyzing Bus Architectures for ARM Processor-based SoC Designs Multi-Core ARM Designs: Inter-Processor Communications vs. SMP An Introduction to Security Solutions for Network-Enabled Embedded Devices Eclipse-Based Development for ARM Processors Hands-on Tutorial: Using a Firmware Testbench to Boost Functional Verification Coverage Panel: Beating the NRE and IP Challenge Register today

	Partner Highlight
	Boost Performance in Your High Performance Application The TMS320C6455 DSP, based on the new C64x+ DSP core, offers improved performance, reduced code size, plus more on-chip memory. In addition, this new DSP enables high-performance, multi-processing via Serial RapidIO™ and other new high bandwidth peripherals. Complete details For more information, view the partner datasheet .

	EDA Tech Forums
	You won't want to miss these free, one-day events featuring hands-on workshops and keynote addresses. Design areas covered include system design, functional design, embedded systems design, design to silicon, and IC nanometer design. August events will take place in the Pacific region and Japan. More information

Best Regards, Mentor Graphics Corporation SoC Design and Verification Division http://www.mentor.com/products/fv/hwsw_coverification/index.cfm

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